This invention relates, in general, to a method of manufacturing a semiconductor device, and more particularly, to a method of adjusting a threshold voltage during the manufacturing of a semiconductor device on a semiconductor on insulator substrate for low power applications.
Silicon on insulator or SOI technology provides several advantages over conventional bulk silicon technology for RF, low power, and high performance applications. These advantages include reduced processing steps, CMOS circuit latchup elimination, higher transistor density, parasitic capacitance reduction for increased speed, improved device isolation, and superior radiation hardness.
In SOI technology, the threshold voltage of a transistor is of critical importance and is controlled by several factors including the doping level in the channel of the FET. Since diffusion well isolation is not required for SOI devices, the doping level is controlled by implanting a dopant near the beginning of the fabrication process after isolating active regions of the SOI substrate. For complementary SOI technology, the threshold voltage adjustment implant for n-channel devices uses a photoresist mask to block the implant from the active regions of p-channel devices and vice versa. The implant is performed through a sacrificial oxide layer on the surface of the active region of the SOI substrate where the oxide layer serves as an implant screen to reduce implant channeling.
The implanted dopant diffuses during subsequent high temperature processing steps used to form a gate structure on the active region. For SOI substrates, the dopant diffuses and segregates into the buried oxide insulator which produces undesirable FET characteristics including higher leakage currents resulting from a lightly doped back interface between the silicon layer and the underlying oxide insulator. The dopant diffusion and segregation also produce a narrow channel effect where the threshold voltage moves in a positive direction as the device width decreases. The device degradation resulting from the narrow channel effect requires the design and fabrication of wider devices for a given threshold voltage and a fixed implant dose. However, larger devices decrease the density of the circuit layout and increase the power consumed by the circuit which is not compatible with low power applications.
To reduce dopant diffusion and its associated SOI device degradation, the threshold voltage adjustment implant can be performed through the gate oxide instead of through a sacrificial implant screen to reduce channeling. Although this process eliminates the high temperature gate oxide formation step which promotes dopant diffusion, this process introduces an additional problem of gate oxide integrity since the exposed gate oxide can be damaged or contaminated. Also, after the threshold voltage adjustment implant a high temperature oxidation after gate etch to repair the gate structure and a high temperature densification anneal after spacer formation still remain.
To protect gate oxide integrity, a portion of the gate polysilicon layer can be deposited on the gate oxide prior to the threshold adjustment implant, and the remainder of the gate can be deposited after the implant. However, dopant diffusion still occurs since two high temperature oxidations still remain after the threshold voltage adjustment implant. In addition to the increased complexity and cost of a split-gate deposition process, a gate depletion phenomenon can worsen performance if an oxide layer exists between the two gate polysilicon layers and serves as a diffusion barrier during gate doping.
Another proposed solution to the dopant diffusion issue is to reduce the temperature of the post-implant high temperature processing. However, oxide enhanced diffusion of dopants is significant even at the reduced temperatures, and the reduced temperature steps are more costly and complicated than conventional high temperature steps.
Accordingly, a need exists for adjusting the threshold voltage of a semiconductor device fabricated on a semiconductor on insulator substrate. While reducing dopant redistribution after performing the threshold voltage adjustment implant, the method should maintain the advantages and improve the processing simplicity of SOI technology.